The present invention relates to a voltage follower circuit, more particularly, to a low offset voltage follower circuit which is suitable for incorporation into a monolithically integrated circuit constructed using MOS (Metal Oxide Semiconductor) technology.
In an integrated circuit it is often necessary to apply a voltage supplied from a voltage source having a high output impedance to a load with a comparatively low impedance of a purely or predominantly capacitive type.
To satisfy this requirement, a voltage follower circuit is generally interposed between the voltage source and the load; the circuit output follows the input voltage and has a high input impedance and low output impedance thus producing an impedance decoupling between the voltage source and the load.
Voltage follower circuits are used, for example, in complex amplifiers in monolithically integrated circuits.
The essential requirements which a voltage follower circuit of this type must satisfy are:
a voltage gain substantially equal to unity; PA1 a substantially zero offset voltage (i.e.-the difference between the DC output voltage and the DC input voltage); PA1 maximum reduction of the harmonic distortion introduced into the output signal. PA1 low integration area occupation; PA1 ease of insertion within more complex circuit structures; PA1 low power dissipation with an adequate speed of response; PA1 absence of both positive and negative voltage overshoots in the response to an input voltage signal having a stepped wave shape.
Other important requirements are:
Known emitter follower and source follower circuits whose output follows the signal voltage supplied as an input thereto with a gain fairly close to unity may be used as voltage follower circuits. These known circuits, however, have an offset between the output voltage and the input voltage which is, in absolute terms, respectively equal to a base-emitter voltage (VBE) of a bipolar transistor or approximately equal to a threshold voltage (VTH) of a field effect transistor as is known to persons skilled in the art.
A further known voltage follower circuit, as shown in FIG. 1, comprises an amplifier A1 with a high open loop voltage gain A, which has an output terminal and a first inverting input terminal and a second non-inverting input terminal. The non-inverting input terminal forms an input terminal IN of the voltage follower circuit. The output terminal of the amplifier A1 is connected to the inverting input terminal via a conductor 101 for producing a "unity reaction feedback" and forms an output terminal OUT of the voltage follower circuit. A voltage to be followed VIN is supplied between the input terminal IN and a reference terminal, shown by VR in FIG. 1. The output voltage VOUT is then supplied by the follower circuit between the output terminal OUT and the reference terminal VR. The latter may possibly be the negative terminal VSS of a supply voltage source or a ground terminal.
A load, not shown in FIG. 1, may be inserted between the output terminal OUT and the terminal VR.
If the value of the gain A is sufficiently high, the output voltage VOUT follows the input voltage VIN as an excellent approximation thereof (the voltage gain of the voltage follower circuit is in fact A/(1+A) and the circuit configuration shown adequately satisfies the first three requirements discussed above.
In order to achieve a gain close to unity for the signal voltage, it would be possible to use an operational amplifier with two voltage gain stages, whose open loop voltage gain A is relatively high.
As known to persons skilled in the art, the use of an operational amplifier of this type produces a system in which there may easily be a risk of instability and in which the possibility of overshoot, in some cases considerable, may not be excluded in the response to a voltage signal having a stepped wave shape supplied to the input terminal IN.
This type of amplifier therefore requires a compensation capacitor to ensure the stability of the circuit and to reduce the voltage overshoot in the circuit response to an input voltage signal having a stepped wave shape to a tolerable value. This leads to a considerable increase in integration area occupation which increases with increases in the capacitive value of the load which the voltage follower circuit has to drive.
The power dissipation of this circuit structure may also be excessive, given that in a two-stage operational amplifier there are various circuit "branches" which absorb supply current. It should be borne in mind in this respect that the presence of the compensation capacitor must also be taken into account in dimensioning the biasing currents of the two stages of the amplifier in order to obtain a suitable speed of response.
This circuit is not particularly suitable for insertion in more complex monolithically integrated circuit structures.
For these reasons, use is predominantly made of single stage amplifiers, even though the resultant follower circuit has some drawbacks.
A typical particularly simple embodiment of a single stage amplifier with MOS type field effect transistors used in voltage follower circuits will now be examined. The amplifier in this case comprises identical first and second MOS transistors having the same type of conductivity (for example N-channel transistors), whose respective source electrodes are connected together in a circuit node thereby forming a circuit structure commonly defined as a "coupled source differential pair" (see, for example, "Basic MOS Operational Amplifier Design--An Overview" by P. R. Gray in "Analog MOS Integrated Circuits", edited by P. R. Gray, D. A. Hodges and R. W. Brodersen, IEEE Press, New York, 1980, pp. 31-32).
This circuit node is connected to a negative terminal of a supply voltage source via a constant current generator, while the drain electrodes of the first and second transistors are respectively connected to a positive terminal of this supply voltage source via first and second substantially identical load components.
The gate electrodes of these first and second transistors respectively form a non-inverting input terminal and an inverting input terminal of the amplifier, whose output terminal is then formed by the drain electrode of the second transistor.
The two transistors operate in the saturation range.
The open loop voltage gain A of this amplifier is: EQU A=g.sub.m Z.sub.OUT' /2 (1)
in which g.sub.m is the transconductance of the two transistors (which obviously have the same transconductance) and Z.sub.OUT' is the overall impedance present between the output terminal and the negative terminal of the supply voltage source.
The complexity of this circuit structure is due to the circuit technology used for the construction of the load components. These load components are generally constructed either with two identical resistors (possibly using MOS type transistors) or with two identical constant current generators with a high output impedance or by a current mirror circuit comprising two identical P-channel transistors if the circuit is constructed using complementary MOS type transistors.
In the first case, however, the open loop voltage gain of the amplifier cannot in practice be very high as a result of which the voltage gain of the follower circuit diverges substantially from unity. For the same reason, the offset between the output voltage and the input voltage may be non-negligible.
In the second case, there are serious problems in biasing of the transistors inserted in the circuit which may lead to a malfunction of the circuit itself (the first transistor of the differential pair may in particular be caused to operate outside of the saturation range) and which lead to the appearance of a systematic offset between the output voltage and the input voltage of the follower circuit for input voltage values outside of a very limited specific range.
In the third case, the overall structure of the voltage follower circuit comprising this current mirror amplifier does not enable, except for input voltage values in a very limited specific range, the achievement of identical biasing conditions for the two transistors of the differential pair. As a result of which, a systematic offset is provided between the output voltage and the input voltage. In addition, the presence within the follower circuit of a full feedback loop formed by the two transistors of the differential pair and the current mirror circuit structure leads, in the same way as mentioned above with respect to the circuit which uses an amplifier with two voltage gain stages, to possible instabilities and overshoot in the response to input voltage signals having a stepped wave shape.